Changes between Version 4 and Version 5 of 2014WP/2014_SystemSimplification

Timestamp:

2013-12-10T17:21:26+01:00 (10 years ago)

Author:

clevy

Comment:

--

2014WP/2014_SystemSimplification

@@ -1 +1 @@
 = '''Note on possible system simplification''' =
+Last edited [[Timestamp]]
+
 We need to simplify the code for both maintenance and future evolution. This means fewer options, and a consensus on the default (and thus well validated) set of numerics.
 
@@ -11 +13 @@
 
 == '''Environment :''' ==
-  • suppress most of the CPP keys, if not all of them • dynamical allocation: return back to standard allocation (no more ''' CALL ''' wrk_alloc and ''' CALL ''' wrk_dealloc)
+  • suppress most of the CPP keys, if not all of them • dynamical allocation: return back to standard allocation (no more '''  CALL '''  wrk_alloc and '''  CALL '''  wrk_dealloc)
 
 == '''Free surface & vertical coordinate :''' ==
@@ -20 +22 @@
   • linear option set without optimization (i.e. starting from the non-linear case with minimal changes, not optimal changes), or linear case suppressed ??
 
-  • vertical coordinate : default option mixte zps/s-tilde coordinate (thus with variable volume level), with mixte zps*/s*, mixte z/s, zps, z and s coordinate system as sub-option (same code used) 
+  • vertical coordinate : default option mixte zps/s-tilde coordinate (thus with variable volume level), with mixte zps*/s*, mixte z/s, zps, z and s coordinate system as sub-option (same code used)
 
   Needs :
@@ -75 +77 @@
   • Smagorinsky (?) : use 3rd order operator (UBS) instead and remove it ?
 
-  • tracer advection schemes: diminish their number. Typically one module for 2^   nd^   /4^   th^    order and one for a 3^   rd^    order scheme, both associated with an optional flux limiter to ensure positivity.[[BR]]
+  • tracer advection schemes: diminish their number. Typically one module for 2^    nd^    /4^    th^     order and one for a 3^    rd^     order scheme, both associated with an optional flux limiter to ensure positivity.[[BR]]
 
 == '''Outputs :''' ==