Opened 7 months ago

Last modified 4 months ago

#2365 new Task

HPC-02_Daley_Tiling

Reported by: hadcv Owned by: hadcv
Priority: low Milestone: IMMERSE 2020
Component: MULTIPLE Version: trunk
Severity: major Keywords:
Cc: Review: pending
MP ready?: no
Progress: A trial implementation of tiling in `tra_ldf_iso` has been proposed as a framework and is to be reviewed.

Description (last modified by hadcv)

This task relates to the use of loop tiling to improve cache reuse and improve computational performance.

Workplan action

Wikipage: wiki:2020WP/HPC-02_Daley_Tiling

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Change History (1)

comment:1 Changed 4 months ago by hadcv

  • Component changed from DYN to MULTIPLE
  • Description modified (diff)
  • Progress modified (diff)

Update progress to reflect trial implementation.

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